Advantech MMP3-21 Bedienungsanleitung PDF herunterladen (Seite 39)

Advantech SOM-Express Design Guide

Chapter 4 General Design Recommendations 39

4.2 Differential Impedance Targets for Microstrip Routing

Table 4.3 shows the target impedance of the differential signals. The carrier board

should follow the required impedance in this table.

Table 4.3 Differential Signals Impedance Requirement

Signal Type Impedance

Host Clock 100 ohm +/- 20%

DMI 100 ohm +/- 20%

Ext Gfx-PCI Express Arch. 100 ohm +/- 20%

SDVO 100 ohm +/- 20%

LVDS 100 ohm +/- 20%

SATA 100 ohm +/- 20%

USB 90 ohm +/- 20%

PCI Express 100 ohm +/- 20%

DDR2 (clocks) 70 ohm +/- 20%

DDR2 (Strobes) 85 ohm +/- 20%

LAN 100 ohm +/- 20

4.3 Alternate Stack Ups

When customers choose to use different stack-ups (number of layers, thickness,

trace width, etc.), the following key elements should be observed:

1. Final post lamination, post etching, and post plating dimensions should be

used for electrical model extractions.

2. All high-speed signals should reference solid ground planes through the

length of their routing and should not cross plane splits. To guarantee this,

both planes surrounding strip-lines should be GND.

3. Recommends that high-speed signal routing be done on internal, strip-line

layers. High-speed routing on external layers should be minimized in order

to avoid EMI. Routing on external layers also introduces different delays

compared to internal layers. This makes it extremely difficult to do length

matching if routing is done on both internal and external layers.

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Advantech MMP3-21 Bedienungsanleitung Seite 39