Advantech PCI-1710HG Spezifikationen

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Copyright Notice
This documentation and the software included with this product are
copyrighted 2003 by Advantech Co., Ltd. All rights are reserved.
Advantech Co., Ltd. reserves the right to make improvements in the
products described in this manual at any time without notice. No part of
this manual may be reproduced, copied, translated or transmitted in any
form or by any means without the prior written permission of
Advantech Co., Ltd. Information provided in this manual is intended to
be accurate and reliable. However, Advantech Co., Ltd. assumes no
responsibility for its use, nor for any infringements of the rights of third
parties which may result from its use.
Acknowledgements
PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are
trademarks of International Business Machines Corporation. MS-DOS,
Windows, Microsoft Visual C++ and Visual BASIC are trade-marks of
Microsoft Corporation. Intel and Pentium are trademarks of Intel
Corporation. Delphi and C++ Builder are trademarks of Borland
Software Corporation.
CE notification
The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L,
developed by ADVANTECH CO., LTD., has passed the CE test for
environmental specifications when shielded cables are used for external
wiring. We recommend the use of shielded cables. This kind of cable is
available from Advantech. Please contact your local supplier for
ordering information.
On-line Technical Support
For technical support and service, please visit our support website at:
http://www.advantech.com/support
Part No.: 2000000041 2nd Edition
Printed in Taiwan November 2003
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1 2 3 4 5 6 ... 163 164

Inhaltsverzeichnis

Seite 1

i Copyright Notice This documentation and the software included with this product are copyrighted 2003 by Advantech Co., Ltd. All rights are reserved

Seite 2

x Fig. 5-4 Selecting the device you want to calibrate·············································73 Fig. 5-5 Warning message before start calibratio

Seite 3 - Contents

90 A.2 PCI-1711/1711L Specifications Analog Input Channels 16 Single-Ended Resolution 12-bit FIFO Size 1K samples Max. Sampling Rate 100 KS/s max

Seite 4

91 Digital Input/Output Input Channels 16 Low 0.4 V max. Input Voltage High 2.4V min. Low 0.4 V max. @ - 0.2mA Input Load High 2.7V min. @ 20µ A

Seite 5

92 A.3 PCI-1716/1716L Specifications Analog Input Channels 16 Single-Ended or 8rdiggerential or combination Resolution 16-bit FIFO Size 1K sample

Seite 6

93 Analog Input ( Only for PCI-1716 ) Channels 2 Resolution 16-bit Operation mode Single output Throughput * 200 KS/s max. per channel ( FSR) Usin

Seite 7

94 General I/O Connector Type 68-pin SCSI-II female Dimensions 175 mm x 100 mm ( 6.9” x 3.9” ) Typical + 5 V @ 850mA + 12V @ 600mA Power Consumption

Seite 8

95 Appendix B. Block Diagrams B.1 Block Diagram of PCI-1710/1710L/1710HG/1710HGL

Seite 9 - Figures

96 B.2 Block Diagram of PCI-1711/1711L

Seite 10

97 B.3 Block Diagram of PCI-1716/1716L

Seite 11 - Introduction

98 (This page is left blank for hard printing.)

Seite 12

99 Appendix C. Register Structure and Format C.1 Overview The PCI-1710/1710L/1710HG/1710HGL/1

Seite 13 - 1. Introduction

1 Introduction 1 CHAPTER

Seite 14

100 C.2 I/O Port Address Map The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L requires 32 consecutive addresses in the PC's I/O space.

Seite 15 - 1.1 Features

101 Table C-1 PCI-1710/1710L/1710HG/1710HGL/1711/1711L register format (Part 1) Read Base Address +decimal 7 6 5 4 3 2 1 0 Channel Number

Seite 16 - Plug-and-Play Function

102 Table C-1 PCI-1716/1716L register format (Part 2) Read Base Address +decimal 7 6 5 4 3 2 1 0 A/D Data 1 AD15 AD14 AD13 AD12 AD11 AD1

Seite 17

103 Table C-1 PCI-1710/1710L/1710HG/1710HGL/1711/1711L/ 1716/1716L register format (Part 3) Read Base Address +decimal 7 6 5 4 3 2 1 0 Dig

Seite 18 - Short Circuit Protection

104 Table C-1 PCI-1710/1710L/1710HG/1710HGL/1711/1711L register format (Part 4) Write Base Address +decimal 7 6 5 4 3 2 1 0 Software A/D Tri

Seite 19 - 1.2 Installation Guide

105 Table C-1 PCI-1716/1716L register format (Part 5) Write Base Address +decimal 7 6 5 4 3 2 1 0 Software A/D Trigger 1 0 A/D Channel

Seite 20

106 Table C-1 PCI-1710/1710L/1710HG/1710HGL/1711/1711L/ 1716/1716L register format (Part 6) Write Base Address +decimal 7 6 5 4 3 2 1 0 Dig

Seite 21 - 1.3 Software

107 C.3 Channel Number and A/D Data — BASE+0 and BASE+1 BASE+0 and BASE+1 hold the result of A/D conversion data. For PCI-1710/1710L/1710HG/1710HGL

Seite 22 - 1.4 Accessories

108 For PCI-1716/1716L, the 16 bits of data from the A/D conversion are stored in BASE+1 bit 7 to bit 0 and BASE+0 bit 7 to bit 0. Table C-3 PCI-17

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109 C.4 Software A/D Trigger — BASE+0 You can trigger an A/D conversion by software, the card's on-board pacer or an external pulse. BASE+6,

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Seite 25 - Installation

110 C.5 A/D Channel Range Setting — BASE+2 Each A/D channel has its own input range, controlled by a gain code stored in the on-board RAM. To cha

Seite 26

111 Table C-7 lists the gain codes for the PCI-1711/1711L. Table C-5 Gain codes for PCI-1710/1710L PCI-1710/1710L Gain Code Gain Input Range(V)

Seite 27 - 2. Installation

112 Table C-6 Gain codes for PCI-1710HG/1710HGL PCI-1710HG/1710HGL Gain Code Gain Input Range(V) B/U G2 G1 G0 1 -5 to +5 0 0 0 0 10 -0.5

Seite 28

113 Table C-7 Gain codes for PCI-1711/1711L PCI-1711/1711L Gain Code Gain Input Range(V) G2 G1 G0 1 -10 to +10 0 0 0 2 -5 to +5 0 0 1 4

Seite 29 - 2.2 Driver Installation

114 C.6 MUX Control — BASE+4 and BASE+5 Table C-8 Register for multiplexer control Write Multiplexer Control Bit # 7 6 5 4 3 2 1 0 BASE

Seite 30 -

115 ? BASE+4 bit 3 to bit 0, STA3 ~ STA0, hold the start scan channel number. ? BASE+5 bit 3 to bit 0, STO3 ~ STO0, hold the stop scan channel nu

Seite 31 - 2.3 Hardware Installation

116 For example, the AI0 and AI1 is a pair. When in single-ended mode, we can get data from AI0 and AI1 separately. But if we set them as differentia

Seite 32

117 Warning! Only even channels can be set as differential. An odd channel will

Seite 33

118 C.7 Control Register — BASE+6 The write-only register BASE+6 and BASE+7 allows users to set an A/D trigger source and an interrupt source. Ta

Seite 34 - Setting Up the Device

119 IRQEN Interrupt enable bit. 0 Disable 1 Enable ONE/FH Interrupt source bit 0 Interrupt when an A/D conversion occurs

Seite 35

3 1. Introduction Thank you for buying the Advantech PCI-1710/1710L/1710HG/ 1710HGL/1711/1711L/

Seite 36 - Configuring the Device

120 connected to 68 pin SCSI-II connector respectively. 1 A/D and D/A calibration mode The wiring becomes that AI0 is connected to 0 V (AGND), AI2

Seite 37

121 C.8 Status Register — BASE+6 and BASE+7 The registers of BASE+6 and BASE+7 provide information for A/D configuration and operation. Table C-1

Seite 38 - 2.5 Device Testing

122 C.9 Clear Interrupt and FIFO — BASE+8 and BASE+9 Writing data to either of these two bytes clears the interrupt or the FIFO. Table C-11 Reg

Seite 39

123 C.11 D/A Output Channel 0 — BASE+10 and BASE+11 The write-only registers of BASE+10 and BASE+11 accept data for D/A Channel 0 output. PCI-17

Seite 40 - 1710HG/1711/1716)

124 C.12 D/A Output Channel 1 — BASE+12 and BASE+13 The PCI-1716 provides the innovative design as gate control for Analog Output function. It wo

Seite 41

125 C.13 D/A Output Channel 1 — BASE+12 and BASE+13 The write-only registers of BASE+12 and BASE+13 accept data for D/A channel 1 output. PCI-17

Seite 42

126 C.14 D/A Reference Control — BASE+14 The write-only register of BASE+14 allows users to set the D/A reference source. PCI-1710L/1710HGL/1711L/

Seite 43 - Testing Counter Function

127 DAn_B/U for D/A output channel n 0 Bipolar 1 Unipolar DAn_I/E Internal or external reference voltage for D/A output channel n 0 In

Seite 44

128 C.15 Digital I/O Registers — BASE+16 and BASE+17 The PCI-1710/1710L/ 1710HG/1710HG/1711/1711L/1716/1716L offers 16 digital input channels and

Seite 45 - Signal Connections

129 C.16 Calibration Registers — BASE+18 and BASE+19 The PCI-1716/1716L offers Calibration registers BASE+16 and BASE+17 for user to calibrate the

Seite 46

4 w/o analog output PCI-1711 12-bit, 100kS/s 16-ch S.E. Inputs Low-cost Multifunction card PCI-1711L 12-bit, 100kS/s 16-ch S.E. Inputs Lo

Seite 47 - 3. Signal Connections

130 Table C-21 Calibration Command and Data Register PCI-1716/1716L Command Code Meaning CM3 CM2 CM1 CM0 A/D bipolar offset adjust 0 0 0 0 A/D

Seite 48

131 C.17 Board ID Registers — BASE+20 The PCI-1710/1710L/1710HG/1710HGL/1716/1716L offers Board ID register BASE+20. With correct Board ID setting

Seite 49 - 1710HGL/1711L/1716L

132 (This page is left blank for hard printing.)

Seite 50

133 Appendix D. 82C54 Counter Chip Function D.1 The Intel 82C54 The PCI-1710/1710L/1710HG/1710

Seite 51

134 Counter 1 & 2 Counter 1 and counter 2 of the counter chip are cascaded to create a 32-bit timer for the pacer trigger. A low-to-high edge of

Seite 52

135 D.2 Counter Read/Write and Control Registers The 82C54 programmable interval timer uses four registers at addresses BASE + 24(Dec), BASE + 26(Dec

Seite 53

136 Description: SC1 & SC0 Select counter Counter SC1 SC0 0 0 0 1 0 1 2 1 0 Read-back c

Seite 54

137 BCD Select binary or BCD counting BCD Type 0 Binary counting 16-bits 1 Binary coded decimal (BCD) counting If you set the module for bina

Seite 55 - is 1 kW, and each of the

138 by C2 to C0 contains a byte which shows the status of the counter. The data format of the counter read/write register then becomes: BASE+24/26/2

Seite 56

139 D.3 Counter Operating Modes MODE 0 – Stop on Terminal Count The output will initially be low after you set this mode of operation. After you load

Seite 57

5 1.1 Features The Advantech PCI-1710/1710L/1710HG/1710HGL/1711/1711L/ 1716/1716L provides users with the most requested measurement and control funct

Seite 58

140 pulses, the present period will not be affected, but the subsequent period will reflect the value. The gate input, when low, will force the outp

Seite 59

141 (N+1)/2 counts and low for (N-1)/2 counts. MODE 4 –Software-Triggered Strobe After the mo de is set, the output will be high. When the count is

Seite 60

142 D.4 Counter Operations Read/Write Operation Before you write the initial count to each counter, you must first specify the read/write operation t

Seite 61 - Software Overview

143 latch commands, one for each counter latched. The read-back command can also latch status information for selected counter(s) by setting STA bit

Seite 62

144 (This page is left blank for hard printing.)

Seite 63 - 4. Software Overview

145 Appendix E. PCI-1716/1716L Calibration (Manually) E.1 A/D Calibration Regular and proper c

Seite 64 - Programming Tools

146 discrepancy is less then 2 LSB. If so, to go to next step. Otherwise, you must change the value and repeat all the procedure in this step again u

Seite 65

147 to clear FIFO. Then to set A/D channel to channel 2, and to set the range as -5 V to +5 V. 9. Writing the value from 0x0300 to 0x03FF sequenti

Seite 66

148 E.2 D/A Calibration (for PCI-1716 only) You can select an on-board +5V or +10V internal reference voltage or an external voltage as your analog o

Seite 67

149 BASE+9 to clear FIFO. Then to set the A/D range as 0 V to 10 V, and to set the D/A range as 0 V to 10 V. Next, writing 0xFFFF to corresponding D/A

Seite 68

6 Plug-and-Play Function The Advantech PCI-1710/1710L/1710HG/1710HGL/1711/1711L/ 1716/1716L is a Plug-and-Play device, which fully complies with the

Seite 69 - Calibration

150 corresponding D/A registers (BASE+10 and BASE+12). 7. Writing the value from 0x0600 to 0x06FF sequentially to Calibration Command and Data regis

Seite 70

151 Table E-2 D/A binary code table A/D code Mapping Voltage Hex. Dec. Bipolar Unipolar 0000h 0 -FS 0 7FFFh 32767 -1 LSB 0.5 FS – 1 LSB 8

Seite 71 - 5. Calibration

152 (This page is left blank for hard printing.)

Seite 72 - VR Assignment

153 Appendix F. Screw-terminal Board F.1 Introduction The PCLD-8710 Screw-terminal Board provide

Seite 73 - VR assignment

154 F.2 Features w Low-cost screw-terminal board for the PCI-1710/1710L/1710HG/ 1710HGL/1711/1711L/1716/1716L with 68-pin SCSI-II connector. w On-

Seite 74 - A/D Calibration

7 On-board FIFO (First-In-First-Out) Memory The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L provides an on-board FIFO memory buffer, storing u

Seite 75 - Self A/D Calibration

8 On-board Programmable Counter The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L is equipped with a programmable counter, which can serve as

Seite 76

9 1.2 Installation Guide Before you install your PCI-1710/1710L/1710HG/1710HGL/1711/ 1711L/1716/1716L card, please make sure you have the following n

Seite 77

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Seite 78

10 Fig.1-1 Installation Flow Chart

Seite 79

11 1.3 Software Advantech offers a rich set of DLL drivers, third-party driver support and application software to help fully exploit the functions of

Seite 80

12 1.4 Accessories Advantech offers a complete set of accessory products to support the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L cards. T

Seite 81

13 n PCLD-8710 The PCLD-8710 is a DIN-rail mounting screw-terminal board to be used with any of the PC-LabCards which have 68-pin SCSI connectors.

Seite 82 - Calibration Utility

14 (This page is left blank for hard printing.)

Seite 83

15 Installation CHAPTER 2

Seite 84 - A/D channel Auto-Calibration

16 (This page is left blank for hard printing.)

Seite 85

17 2. Installation This chapter gives users a package item checklist, proper instructions about

Seite 86 - D/A channel Auto-Calibration

18 before opening the bag. w Take hold of the card only by the metal bracket when removing it out of the bag. After taking out the card, first you

Seite 87

19 2.2 Driver Installation We recommend you to install the driver before you plug the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L card into

Seite 88

iii Contents 1. Introduction···········································································································3 1.1 Features

Seite 89

20 Note: If the autoplay function is not enabled on your computer,

Seite 90 - Manual A/D Calibration panel

21 2.3 Hardware Installation Note: Make sure you have installed the driver first before yo

Seite 91

22 Step 7: Connect appropriate accessories (68-pin cable, wiring terminals, etc. if necessary) to the PCI card. Step 8: Replace the cover of your com

Seite 92 - Choosing Output Voltage

23 Fig.2-3 The device name listed on the Device Manager Note: If

Seite 93 - Fig. 5-19)

24 2.4 Device Setup & Configuration The Device Manager program is a utility that allows you to set up, configure and test your device, and later

Seite 94

25 Fig. 2-4 The Device Manager dialog box Fig. 2-5 Selecting the device you want to install

Seite 95 - Appendixes

26 Configuring the Device Step 4: On the Device Setting dialog box (Fig. 2-6), you can configure the voltage source either as External or Internal,

Seite 96

27 Fig. 2-7. Fig. 2-7 The Device Name appearing on the list of devices box Note: As w

Seite 97 - Appendix A. Specifications

28 2.5 Device Testing Following through the Setup and Configuration procedures to the last step described in the previous section, you can now procee

Seite 98 - Analog Output

29 Note: n You can access the Device Test dialog box either by the

Seite 99

iv 5.2 PCI-1711/1711L Calibration····································································67 5.3 PCI-1716/1716L Calibration ··············

Seite 100 - Analog Input

30 Testing Analog Output Function (only for PCI-1710/ 1710HG/1711/1716) Click the Analog Output tab to bring it up to the foreground. The Analog Outp

Seite 101 - General

31 Testing Digital Input Function Click the Digital Input tab to show forth the Digital Input test panel as seen below. Through the color of the lamp

Seite 102

32 Testing Digital Output Function Click the Digital Output tab to bring up the Digital Output test panel such as the one seen on the next page. By p

Seite 103 - Counter/Timer

33 Testing Counter Function Click the Counter Tab to bring its test panel forth. The counter channel (Channel 0) offers the users two options: Event

Seite 104

34 (This page is left blank for hard printing.)

Seite 105 - Appendix B. Block Diagrams

35 Signal Connections CHAPTER 3

Seite 106

36 (This page is left blank for hard printing.)

Seite 107

37 3. Signal Connections 3.1 Overview Maintaining signal connections is one of the most impor

Seite 108

38 Note: The three ground references AIGND, AOGND, and DGND should be used discreetly eac

Seite 109 - C.1 Overview

39 Fig. 3-1 I/O connector pin assignments for the PCI-1710/ 1710L/1710HG/1710HGL/1711/1711L/1716/1716L *: Pins 23~25 and pins 57~59 are not define

Seite 110 - C.2 I/O Port Address Map

v C.15 Digital I/O Registers — BASE+16 and BASE+17 ······················· 128 C.16 Calibration Registers — BASE+18 and BASE+19····················

Seite 111

40 I/O Connector Signal Description Table 3-1 I/O Connector Signal Description Signal Name Reference Direction Description AI<0…15> AIGND In

Seite 112

41 3.3 Analog Input Connections The PCI-1710/1710L/1710HG/1710HGL/1716/1716L supports both 16-channel Single-Ended or 8 differential A/D Input, how

Seite 113

42 Fig. 3-2 Single-ended input channel connection Differential Channel Connections The differential input channels operate with two signal wires

Seite 114

43 To avoid the ground loop noise effect caused by common-mode voltages, you can connect the signal ground to the Low input. Fig. 3-3 shows a dif

Seite 115

44 against the AIGND. Fig. 3-4 shows a differential channel connection between a floating signal source and an input channel on the PCI-1710/1710L/

Seite 116

45 and rb, for example, if the input impedance rs is 1 kW, and each of the two resistors is 100 kW, then the resistors load down the signal source wi

Seite 117

46 3.4 Analog Output Connections The PCI-1710/1710HG/1711/1716 provides two D/A output channels (PCI-1710L/1710HGL/1711L/1716L are not designed to

Seite 118

47 3.5 Trigger Source Connections Internal Pacer Trigger Connection The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L includes one 82C54 com

Seite 119

48 3.6 Field Wiring Considerations When you use the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/ 1716/1716L to acquire data from outside, noises in th

Seite 120

49 signal cable at a right angle to the power line to minimize the undesirable effect. w The signals transmitted on the cable will be directly affec

Seite 121 - PCI-1711/1711L

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Seite 122

50 (This page is left blank for hard printing.)

Seite 123

51 Software Overview CHAPTER 4

Seite 124

52 (This page is left blank for hard printing.)

Seite 125 - Example 2

53 4. Software Overview This chapter gives you an overview of the software programming choices

Seite 126

54 Register-level Programming Register-level programming is reserved for experienced programmers who find it necessary to write codes directly at the

Seite 127 - Warning!

55 For instructions on how to begin programming works in each development tool, Advantech offers a Tutorial Chapter in the DLL Drivers Manual for you

Seite 128 - Table C-9 Control Register

56 Programming with DLL Driver Function Library Advantech DLL driver offers a rich function library to be utilized in various application programs. T

Seite 129

57 error message. Or you can refer to the DLL Driver Error Codes Appendix in the DLL Drivers Manaul for a detailed listing of the Error Code, Error I

Seite 130

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Seite 132 - BASE+11

vii Tables Table 3-1 I/O Connector Signal Description ························································40 Table C-1 PCI-1710/1710L/1710HG/1710

Seite 133

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Seite 134 - BASE+13

61 5. Calibration This chapter provides brief information on PCI-1710/1710L/ 1710HG/1710HGL/171

Seite 135

62 voltage source. Note: Before you calibrate the A/D or D/A function, you must turn on t

Seite 136 - PCI-1710/1710HG/1711/1716

63 Fig. 5-1 PCI-1710/1710L/L1710HG/1710HGL VR assignment The following list shows the function of each VR : VR Function VR1 A/D unipolar offset

Seite 137

64 A/D Calibration Regular and accurate calibration procedures ensure the maximum possible accuracy. The ADCAL.EXE calibration program leads you thro

Seite 138

65 D/A Calibration (for PCI-1710/1710HG only) In a way similar to the ADCAL.EXE program, the DACAL.EXE program leads you through the whole D/A calibr

Seite 139

66 Then, run the ADCAL.EXE program to finish the self-A/D calibration procedure. 1. Set AI0 as differential, bipolar, range ±5 V and AI2 as differe

Seite 140

67 5.2 PCI-1711/1711L Calibration Three calibration programs are included on the companion CD-ROM : ADCAL.EXE A/D calibration program DACAL.EXE

Seite 141

68 VR Assignment There are four variable resistors (VRs) on the PCI-1711 card and two variable resistors (VRs) on the PCI-171L card. These variable

Seite 142

69 A/D Calibration Regular and accurate calibration procedures ensure the maximum possible accuracy. The A/D calibration program ADCAL.EXE leads you

Seite 143 - Function

viii Table C-14 Register for load D/A channel 1 data ············································· 124 Table C-15 Register for D/A channel 1 data····

Seite 144 - Counter 1 & 2

70 You can adjust VR3 and VR4 until the D/A channel 0 and 1 outpu

Seite 145

71 5.3 PCI-1716/1716L Calibration A calibration utility, AutoCali, is included on the companion CD-ROM : AutoCali.EXE PCI-1716/1716L calibration

Seite 146 - Description:

72 Calibration Utility The calibration utility, AutoCali.EXE, provides four functions - auto A/D calibration, auto D/A calibration, manual A/D cali

Seite 147

73 Step 2: Select PCI-1716/1716L in the ADSDAQ dialog box. Fig. 5-4 Selecting the device you want to calibrate Step 3: After you start to calibrat

Seite 148

74 A/D channel Auto-Calibration Step 4: Click the Auto A/D Calibration tab to show the A/D channel auto-calibration panel (Fig. 5-6). Press the start

Seite 149 - D.3 Counter Operating Modes

75 Step 6: The second A/D calibration procedure is enabled (Fig. 5-8) Fig. 5-8 A/D Calibration Procedure 2 Step 7: The third A/D calibration proce

Seite 150

76 Step 8: Auto-calibration is finished. (Fig. 5-10) Fig. 5-10 A/D Calibration is finished D/A channel Auto-Calibration Step 9: Click the Auto D/A

Seite 151

77 Fig. 5-11 Range Selection in D/A Calibration Step 10: D/A channel 0 calibration is enabled (Fig. 5-12) Fig. 5-12 Calibrating D/A Channel 0

Seite 152 - D.4 Counter Operations

78 Step 11: D/A channel 1 calibration is enabled (Fig. 5-13) Fig. 5-13 Calibrating D/A Channel 1 Step 12: Auto-calibration is finished (Fig. 5-14

Seite 153 - Counter Latch Operation

79 A/D channel Manual-Calibration Step 1: Click the Manual A/D Calibration tab to show the A/D channel manual calibration panel. Before calibrating,

Seite 154

ix Figures Fig.1-1 Installation Flow Chart ···············································································10 Fig.2-1 The Setup Screen

Seite 155 - (Manually)

80 Fig. 5-15 Selecting Input Rage in Manual A/D Calibration panel Step 2: According to the difference between reference voltage and receiving dat

Seite 156

81 Step 3: Adjust the registers until they fall between the input voltage from the standard voltage reference and the receiving voltage reflected in

Seite 157

82 Step 2: For example, choose channel 0; select the Range and select the wished output voltage code or value from the radio buttons (Fig. 5-17 and F

Seite 158

83 Step 3: According to the difference between the output voltage from D/A channel and the value in the multi-meter, adjust the gain, bipolar offset

Seite 159

84 (This page is left blank for hard printing.)

Seite 160

85 Appendixes

Seite 161

86 (This page is left blank for hard printing.)

Seite 162

87 Appendix A. Specifications A.1 PCI-1710/1710L/1710HG/1710HGL Analog Input Channels 16 sin

Seite 163 - F.1 Introduction

88 Analog Output Channels 2 Resolution 12-bit Using Internal Reference 0 ~ +5V, 0 ~ +10 V Output Range (Internal & External Reference) Using Ex

Seite 164 - F.3 Applications

89 General I/O Connector Type 68-pin SCSI-II female Dimensions 175 mm x 100 mm ( 6.9” x 3.9” ) Typical + 5 V @ 850mA Power Consumption Max. + 5 V

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