PCI-1751U User Manual iv
3.3.3 Counter 2 ...................................................................... 20
3.3.4 Timer/Counter Frequency and Interrupt ...................... 20
3.4 Interrupt Function............................................................ 21
3.4.1 Introduction .................................................................. 21
3.4.2 IRQ Level .................................................................... 21
3.4.3 Interrupt Control Register (Base + 32) ........................ 21
Table 3.2:Interrupt control register bit map ................. 21
3.4.4 Interrupt Source Control .............................................. 22
Figure 3.3:Figure 3-3: Interrupt sources ...................... 22
Table 3.3:Interrupt mode bit values ............................. 22
3.4.5 Interrupt Triggering Edge Control ............................... 23
Table 3.4:Triggering edge control bit values ............... 23
3.4.6 Interrupt Flag Bit ......................................................... 23
Table 3.5:Interrupt flag bit values ................................ 23
Appendix A Function of 8254 Counter Chip ................... 26
A.1 The Intel 8254 ................................................................. 26
A.2 Counter Read/Write and Control Registers..................... 26
A.3 Counter Operating Modes ............................................... 29
A.3.1 MODE 0 – Stop on Terminal Count ............................ 29
A.3.2 MODE 1 – Programmable One-shot ........................... 29
A.3.3 MODE 2 – Rate Generator .......................................... 29
A.3.4 MODE 3 – Square Wave Generator ............................ 30
A.3.5 MODE 4 – Software Triggered Strobe ........................ 30
A.3.6 MODE 5 – Hardware Triggered Strobe ....................... 30
A.4 Counter Operations ......................................................... 31
A.4.1 Read/Write Operation .................................................. 31
A.4.2 Counter Read-back Command ..................................... 31
A.4.3 Counter Latch Operation ............................................. 31
A.5 Counter Applications....................................................... 32
Appendix B Register Format of PCI-1751U .................... 34
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